Vision Mark-32: A ZK-Friendly Hash Function Over Binary Tower Fields

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

Vision Mark-32: A ZK-Friendly Hash Function Over Binary Tower Fields

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

Irreducible Team

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5/1/24

Vision Mark-32: A ZK-Friendly Hash Function Over Binary Tower Fields

In collaboration with 3MI Labs, we introduce a arithmetization-oriented hash function designed for Binius.

Irreducible Team

•

5/1/24

4/24/24

Accelerating Polygon zkEVM

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

Irreducible Team

4/24/24

Accelerating Polygon zkEVM

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

Irreducible Team

4/24/24

Accelerating Polygon zkEVM

We report the first end-to-end, FPGA-accelerated Polygon zkEVM prover.

Irreducible Team

4/24/24

Becoming Irreducible

Ulvetanna is rebranding to Irreducible

Irreducible Team

4/24/24

Becoming Irreducible

Ulvetanna is rebranding to Irreducible

Irreducible Team

4/24/24

Becoming Irreducible

Ulvetanna is rebranding to Irreducible

Irreducible Team

4/1/24

FRI-Binius: Improved Polynomial Commitments for Binary Towers

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

Irreducible Team

4/1/24

FRI-Binius: Improved Polynomial Commitments for Binary Towers

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

Irreducible Team

4/1/24

FRI-Binius: Improved Polynomial Commitments for Binary Towers

In a new research paper, we adapt BaseFold's multivariate FRI commitments to binary towers, reducing Binius proof sizes.

Irreducible Team

1/23/24

Elliptic Curve ZK-Proof Acceleration on AMD Versal

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

Irreducible Team

1/23/24

Elliptic Curve ZK-Proof Acceleration on AMD Versal

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

Irreducible Team

1/23/24

Elliptic Curve ZK-Proof Acceleration on AMD Versal

We present a novel system demo accelerating elliptic curve cryptography on AMD's Versal heterogeneous compute platform.

Irreducible Team

11/20/23

Binius: a Hardware-Optimized SNARK

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

Irreducible Team

11/20/23

Binius: a Hardware-Optimized SNARK

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

Irreducible Team

11/20/23

Binius: a Hardware-Optimized SNARK

We demonstrate a performance-optimized approach to SNARK construction based on towers of binary fields.

Irreducible Team

5/24/23

Poseidon Merkle Trees in Hardware

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

Irreducible Team

5/24/23

Poseidon Merkle Trees in Hardware

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

Irreducible Team

5/24/23

Poseidon Merkle Trees in Hardware

We report the first fully-pipelined FPGA architecture for ZKP-friendly Merkle trees using the Poseidon hash

Irreducible Team

5/4/23

Proximity Testing with Logarithmic Randomness

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

Irreducible Team

5/4/23

Proximity Testing with Logarithmic Randomness

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

Irreducible Team

5/4/23

Proximity Testing with Logarithmic Randomness

Our new result in error-correcting codes yields a 2x zk-SNARK speedup

Irreducible Team

3/22/23

A Throughput-Optimized FPGA Architecture for Goldilocks NTT

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

Irreducible Team

3/22/23

A Throughput-Optimized FPGA Architecture for Goldilocks NTT

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

Irreducible Team

3/22/23

A Throughput-Optimized FPGA Architecture for Goldilocks NTT

We present a modular, fully-pipelined FPGA architecture for large NTT computations in the 64-bit Goldilocks finite field

Irreducible Team

12/16/22

Introducing Irreducible, Cost-Efficient Zero Knowledge Proofs

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

Irreducible Team

12/16/22

Introducing Irreducible, Cost-Efficient Zero Knowledge Proofs

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

Irreducible Team

12/16/22

Introducing Irreducible, Cost-Efficient Zero Knowledge Proofs

Announcing our $15M Seed Round co-led by Bain Capital Crypto and Paradigm with participation from Jump Crypto

Irreducible Team

8/1/22

Caulk+: Table-independent Lookup Arguments

New work on lookup arguments with reduced complexity

Irreducible Team

8/1/22

Caulk+: Table-independent Lookup Arguments

New work on lookup arguments with reduced complexity

Irreducible Team

8/1/22

Caulk+: Table-independent Lookup Arguments

New work on lookup arguments with reduced complexity

Irreducible Team

Want to learn more?

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Want to learn more?

Get in touch with us.

Want to learn more?

Get in touch with us.